Nearly 6% in a single afternoon session. That was the jump posted on May 25 by the STAR 50 index, which tracks the leading technology stocks on the Shanghai exchange, after Huawei unveiled a new theoretical principle for semiconductor design, conceived to reduce its dependence on the Western technologies it can no longer access because of US restrictions.
The announcement came during the 2026 edition of the International Symposium on Circuits and Systems (ISCAS). It was presented by He Tingbo, president of Huawei’s semiconductor division and a member of the company’s board, who described what the group calls the τ (tau) scaling law. According to Huawei, it is the first time a Chinese player has put forward a principle meant to guide the development of the sector on a global scale. The work was subsequently filed as a paper on ChinaXiv, the preprint platform of the Chinese Academy of Sciences.
How Huawei plans to bypass US sanctions
For nearly fifty years, the chip industry has rested on Moore’s law, the empirical principle that the number of transistors that can be packed onto a circuit doubles at regular intervals thanks to miniaturization. That model is now showing its limits: the geometric shrinking of transistors has slowed, and the economic gains from the miniaturization race have thinned out. Huawei proposes instead to shift attention to a different variable. In place of italicgeometric scalingitalic it bets on italictemporal scalingitalic, with the goal of systematically cutting the time constant “tau” — the delay with which a signal propagates inside the device.
The principle translates into an architecture named LogicFolding, which acts on four distinct levels. At the device level, it works on the physical properties of transistors and interconnects to reduce latency at its root. At the circuit level, it compresses the critical wiring path so as to increase transistor density. At the chip level, a design approach comes into play that coordinates software, architecture and silicon. And at the system level, a new interconnect protocol redefines how the various components communicate with one another.
The figures Huawei claims
The data presented in Shanghai point to a 53.5% increase in transistor design density and a 12.7% rise in frequency, with a 41% efficiency gain for high-performance cores. The move to the new architecture, Huawei argues, will also bring a cost reduction of around 30%. The horizon it sets is 2031: by that year the Chinese group aims to reach, with its high-end chips, a transistor density equivalent to that of a 1.4-nanometer manufacturing process, alongside clock frequencies holding steady around 5 GHz. These remain stated targets, not yet verifiable in industrial terms.
What makes the move significant geopolitically is the question of equipment. Huawei says it can achieve these results while continuing to use DUV (deep ultraviolet) lithography, the technology it already has, without access to the latest-generation EUV (extreme ultraviolet) machines, whose export to China is blocked by US restrictions. The lever, in essence, shifts from the manufacturing process to the optimization of architecture and packaging. It is the idea He Tingbo sums up in the paper’s conclusions: competitive advantage no longer depends solely on the most advanced lithography, because packaging and the architecture used to interconnect memory and components now weigh as much as cutting-edge process nodes. Over the past six years, the group says it has already mass-produced 381 chip models based on the new principle. The debut on mobile processors is expected this fall, with a new Kirin smartphone chip that will fully adopt LogicFolding technology.
Chinese chip stocks soar in Shanghai
On the markets, the effect was immediate. As noted, on May 25 the STAR 50 index gained nearly 6% in the afternoon session, driven by chip-related sectors. Semiconductor Manufacturing International Corporation (SMIC) closed at the maximum daily trading limit of 20%, hitting a record high and a market capitalization of about 1.25 trillion yuan, roughly €158 billion ($171 billion). The same move played out for Hua Hong Semiconductor, also at the 20% ceiling, with a stock that has nearly doubled in value since the start of the year and a capitalization above 230 billion yuan, around €29 billion ($31 billion).
Market analysts identify several areas potentially affected by the new principle. The first is chip design, because the emphasis on LogicFolding and on software-hardware coordination rewards companies with advanced expertise in developing SoCs (systems-on-chip) and processors. A second front is advanced packaging and chiplets, since heterogeneous integration on 2.5D and 3D packaging serves the density increase Huawei is pursuing. Domestic foundries could benefit insofar as the approach makes it possible to obtain high performance without resorting to EUV lithography. Potential beneficiaries also include semiconductor equipment and materials companies, as well as the hardware segment for AI computing, given that the τ law applies to AI accelerators as well.
Editor’s note
This article was originally published in Italian on money.it by P. F. on May 25, 2026 as «Huawei aggira le sanzioni USA e rivoluziona la produzione di chip. I titoli cinesi schizzano». It has been translated and adapted for an international audience by the Money.it International desk.
